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[ROCm][PERF] Enable AITER PA gluon decode for MiniMax-M3 MTP and dense layers #52849
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4360a28
enable pa_gluon kernel in rocm_aiter_fa
ukannika f71d75f
Fix the uniform-decode assumption from PA decode gluon
ykamiset 5cfdff8
fix drafting function for missing variables
ykamiset 9842652
remove blank line
c2b78e4
[Bugfix][ROCm] Fix KV block zeroer dim classification for permuted la…
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Should we update this?
get_kv_cache_shapeis used by gpu runner to determine how the kvcache is packed in the kvcache buffers/pool/management system. It is not referring to the kvcache shape expect by the kernels.The KVCACHE is reshaped on the fly in the attention forward pass from
(num_blocks, num_kv_heads, block_size, 2 * head_size)to(num_blocks, 2, block_size, num_kv_heads, head_size)every time.However, the kvcache stored in the kvcache management system is still
(num_blocks, num_kv_heads, block_size, 2 * head_size)There was a problem hiding this comment.
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@tjtanaa we see an issue if we don't define the shape and stride order when the shuffle layout is enabled: the pool is then labeled (num_blocks, num_kv_heads, block_size, 2*head_size), where each tokens K is immediately followed by its own V, head_size elements apart. The cache write kernel still writes each blocks K in the shuffle layout because of shuffle layout flag enabled, which assumes K and V are kept apart. Looking into how is it working with shuffle layout enabled for asm pa kernel before this change.
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@tjtanaa Enabled the shuffle layout flag and tested the Llama2 70B model using the asm_pa code path. I am seeing an accuracy issue, and the current state of this file is broken due to the layout changes introduced in this PR #44455. AITER assembly paged-attention kernels require independently contiguous K and V storage. This PR addresses the accuracy issue as well.
Here's the command to reproduce accuracy issue